1. Field of the Invention
The present invention relates to a semiconductor memory device. For example, the present invention relates to a semiconductor memory device including memory cells each having a charge accumulation layer and a control gate.
2. Description of the Related Art
Electrically erasable and programmable read-only memories (EEPROMs) are known as nonvolatile semiconductor memories that allow data to be electrically rewritten. NAND flash memories are known as EEPROMs that allow an increase in capacity and degree of integration.
A flash memory senses data depending on whether a memory cell is turned on or off when a voltage is applied to a corresponding word line. Turning on the memory cell allows current to flow from a corresponding bit line to a corresponding source line. This raises the potential of the source line.
A NAND flash memory reads data from a plurality of memory cells at a time. Thus, the level of a rise in the potential of the source line varies depending on the number of memory cells turned on. A particularly high rise in potential reduces the difference in potential between the source line and the bit line. This may cause erroneous data reading. Thus, for example, Jpn. Pat. Appln. KOKAI Publication No. H11-96783 discloses a method of varying the potential of the word line depending on the potential of the source line.
However, this method may not be sufficient as measures for preventing possible erroneous data reading.